Driving means for crt{3 s

ABSTRACT

Apparatus for driving character-display tubes and the like, especially of the cathode-ray-tube type, providing circuitry for automatically centering symbols being displayed upon the CRT and for synchronously and accurately generating the desired ramp signals in a simple and quite inexpensive manner and which employs circuitry for controlling the timing of the ramp signals to eliminate the need for high-precision synchronous-signalgenerating means.

United States Patent [72] Inventor Richard B. lhnbicki PrincetonJunction, NJ. [2]] Appl. No, 804,643 22] Filed Mar. 5, 1969 [45]Patented July 6, 1971 [73] Assignee Madatron inc.

Rocky H111, NJ.

[54] DRIVING MEANS FOR CRTS Primary Examiner-Rodney D. Bennett, .11.Assistant Examiner-T. H, Tubbesing Attorney-Ostrolenk, Faber, Gerb &Soffen 7 Claims, 14 Drawing Figs.

315/24,178/6.6,l7 8/69- ABSTRACT: Apparatus for drivingcharacter-display tubes [51] Int. Cl 1101; 29/52 d h lik wially of thecathode-ray-tube type, provid- 0 circuitry for automatically centeringsymbols being dis. 695 TV, A played upon the CRT and for synchronouslyand accurately generating the desired ramp signals in a simple and quiteinex- References Cited pensive manner and which employs circuitry forcontrolling UNFFED STATES PATENTS the timing of the ramp signals toeliminate the need for high- 2,084,700 6/1937 Ogloblinsky .,1.78/69.5(TV) X precision synchronous-signalgenerating means.

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PATENTEI] JUL 6 IBYI SHEET 3 OF 5 W Q Qww SHEU 5 [1F 5 PATENTED JUL 615m DRIVING MEANS FOR CRTS The present invention relates to controlcircuitry and more particularly to novel control circuitry adapted foraccurately generating ramp signals of the type employed to drivecathode-ray tubes and the like wherein highly accurate and synchronizedramp signals are generated through the use of simplified circuitry.

Numerous applications exist wherein it is desired to exercise controlover electron tubes. One such application in which the present inventionmay be used to great advantage is that of controlling electron tubes ofthe cathode-ray-tube type. Typically, in displaying or writinginformation upon the face of the CRT the control circuitry operates tosynchronize the deflection signals with one another and with the gridcontrol or unblanking signals so as to display the desired informationin a reliable and accurate manner. One specific embodiment in which suchcontrol circuitry is employed is set forth in detail in copendingapplication Ser. No. 718,553, filed Apr. 3, I968 and assigned to theassignee of the present invention and application Ser. No. 731,467,filed May 23, 1968 now US. N0.No.3,506,873 and likewise assigned to theassignee of the present invention. In the former application, signalsfor controlling the X deflection plates, signals for controlling the Y"deflection plates and signals (unblanking signals) for controlling thecutoff of the electron beam are derived from separate storage locationswithin suitable storage means, which readout of information occurs insuch a manner that these signals are automatically in synchronism uponreadout thereof. In practice, the signals for controlling the deflectionplates are synchronizing signals which, in turn, drive X" and Y" rampgenerators which ultimately drive the deflection plates.

One of the least expensive forms of storage means and which is describedin the former application mentioned hereinabove is a rotating storagemeans such as a magnetic drum or disc containing either a magneticpattern for use with magnetic readout means or a coded pattern for usewith lightsensitive means. The three types of information are normallystored in three individual tracks of the rotating memory, each requiringindividual sensing means (such as magnetic heads, for example) forreadout of the information stored therein.

The present invention is characterized by providing a novel circuitarrangement wherein the same capacity of information may be stored inonly two tracks of the memory thereby reducing the amount of circuitryand other related components in the system and further increasingreliability of the system. The present invention is furthercharacterized by providing novel ramp generating circuits wherein theramp signals generated automatically center the information to bedisplayed upon the cathode-ray tube by generating ramp signals of veryaccurate time duration and voltage swings in spite of the fact that thesynchronizing signals for driving the ramp generators are not accuratelyregulated.

The present invention is comprised of storage means in which thesynchronizing signals for driving the X" and Y" ramp generators arestored in a single track within the memory. The synchronizing signalsare read out through common readout means (such as a magnetic head) andapplied to circuitry capable of distinguishing a predeterminedcharacteristic of the signals.

The synchronizing signals are then applied to their associated rampgenerating circuits which are uniquely designed so as to cause eachramp, which is initiated by a synchronizing signal, to experience avoltage swing between two predetermined voltage levels regardless ofrather significant deviations in time duration between succeedingsynchronizing pulses, thereby enabling the use of rather unsophisticated(and hence inexpensive) storage means, while at the same time assuringexcellent repeatability of the positioning of information to bedisplayed upon the face of the CRT.

In a first preferred embodiment of the present invention, Xsynchronizing signals are represented in storage means by single pulseswhereas Y" synchronizing signals are represented in memory by doublepulses. The circuitry employed to distinguish between the waveforms iscomprised of means for integrating each of the pulses and applying theintegrated value to a threshold circuit which yields an output when theintegrated value surpasses a predetermined threshold level. In a secondpreferred embodiment of the invention, a gating circuit is employed todistinguish between these X" and Y signals on the basis of theiroccurrence in a predetermined time sequence, and to condition variousoutput circuitry to respond only to the letter. In a third preferredembodiment of the present invention, the X and Y synchronizing signalsare distinguished from one another by signal amplitude and separatethreshold circuits are provided for distinguishing between thesynchronizing signals by examination of their signal amplitudes.

In still a fourth form of the present invention, the signal stored inmemory representing the X and Y" synchronizing information are appliedto counter means which, upon counting the generation of a predeterminednumber of X" pulses, generates a Y" pulse in synchronism therewith. Allfour techniques reduce the system circuitry and further act to enhancethe simplicity of the storage means. by eliminating one storage location(i.e. track) and one readout means (i.e. magnetic head).

It is therefore one object of the present invention to provide novelcontrol circuitry for use with cathode-ray tubes and the like whereindeflection and blanking signals are generated in a simple and yet highlyaccurate manner.

Another object of the present invention is to provide novel controlcircuitry for use with cathode-ray tubes and the like wherein thesynchronizing signals for generating the ramp waveforms normally appliedto the deflection means of a cathode-ray tube are stored in a commonstorage location within the memory means provided therefor.

Still another object of the present invention is to provide novelcontrol circuitry for use with cathode-ray tubes and the like and whichis comprised of rotatable memory means having the synchronizing signalsfor use in controlling the ramp waveforms applied to the cathode-raydeflection means stored in a single track thereof.

Another object of the present invention is to provide novel controlcircuitry for use with cathode-ray tubes and the like which is comprisedof memory means for storing the synchronizing signals employed totrigger the initiation of ramp waveforms normally applied to thecathode-ray-tube deflection means within a common location in memory andfurther comprising control circuitry for distinguishing between the twodifferent types of deflection signals stored therein.

Still another object of the present invention is to provide novel rampgenerating circuits for use with cathode-ray tubes and the like whereineach ramp generated by the circuit experiences the same voltage swingregardless of rather significant deviation in the synchronizing signalsemployed to trigger the ramp generator.

These as well as other objects of the present invention will becomeapparent when reading the accompanying description and drawings inwhich:

FIG. I is a schematic diagram showing a system for operating acathode-ray tube.

FIG. la shows a plurality of waveforms useful in describing theoperation of the system of FIG. 1.

FIG. 2 is a schematic diagram showing one preferred embodiment of thepresent invention.

FIG. 2a shows a plurality of waveforms useful in describing theoperation of the embodiment of FIG. 2.

FIG. 3 is a block diagram showing still another preferred embodiment ofthe present invention.

FIG. 3a shows the front face of a cathode-ray-tube display device of thetype shown in FIG. 1, for example, and which. is useful in describingthe operation of the system of FIG. 3.

FIG. 4a is a schematic diagram showing still another preferredembodiment of the present invention.

FIGS. 4b and 4c are schematic diagrams of ramp generators which may beemployed with any of the embodiments of FIGS. 2, 3 or 4a.

FIG. 4d shows a plurality of waveforms useful in describing theoperation of FIGS. 4a-4c.

FIG. 4e is a schematic diagram of an amplifier and shaper which may beused with any of the embodiments shown in FIGS. 2, 3 and 40.

FIG. 4f shows a plurality of waveforms useful in describing theoperation of the ramp generating means of the circuit of FIG. 4b.

FIG. 5 is a schematic diagram showing an alternative embodiment of thecircuit of FIG. 4a.

FIG. 5a shows a waveform diagram useful in describing the operation ofthe circuit of FIG. 5.

FIG. 1 shows a control system for controlling the operation of acathode-ray tube 11 which is provided with a pair of horizontaldeflection means 12 and vertical deflection means 13 which are used todeflect an electron beam (not shown) emanating from an electron gun,shown schematically at 14, which beam is modulated by a control grid,shown schematically at 15. The electron beam is deflected to anyparticular location upon the face 110 of the cathode-ray tube by thehorizontal and vertical deflection means 12 and 13, respectively.

One typical and rather simplified way of controlling the operation ofthe cathode-ray tube 11 for generating characters or symbols iscomprised of a rotating drum memory 16 which is maintained to beconstantly rotated by a motor 17 whose output shaft 18 is preferablydirectly coupled to the rotating drum 16. The surface of the drum, asshown in FIG. 1, is provided with at least three memory tracks 160-] 6cfor storing information relating to the unblanking signals (Z"), X"(horizontal) deflection-synchronizing signals and Y" (vertical)deflection-synchronizing signals, respectively. The information storedin these tracks may be in the form of magnetic saturation patternspicked up by magnetic readout heads 19- 21, respectively. As analternative, the drum may be provided with contrasting light and darkpatterns having light impinging thereon for pickup by suitablephotosensitive means to provide substantially the same type of outputinformation as would be generated by the magnetic readout heads I92I.One of the advantages of providing all of the patterns upon a singlesurface is to guarantee the synchronism between and among these signals.

The magnetic patterns representing the synchronizing and unblankingsignals stored in the tracks of memory drum 16 are shown in FIG. la.Waveform 22 indicates the synchronizing signals generated by theinformation stored in track 160 which are employed for the purpose oftriggering the initiation of a ramp signal, shown by waveform 23, whichramp signal is utilized to drive the vertical or Y" deflection platepair 13 of FIG. 1. The purpose of the synchronizing signals 22 is toterminate a previously generated ramp signal and simultaneously initiatea new ramp signal which is the conventional operation of suchsynchronizing signals. In the case where the face Ila of the cathode-raytube is to be swept a plurality of times in the horizontal direction foreach single sweep in the vertical direction, the track 16b is providedwith a magnetic pattern to generate the signals shown by waveform 24which are employed to trigger the initiation of ramp signals shown bywaveform 25. The number of ramp signals applied to the horizontaldeflection plate pair 12 per ramp signal applied to the verticaldeflection plate 13 is dependent upon the number of horizontal sweepswhich are either desired or required for one single raster of thecathode-ray tube face Ila. In a like manner, the synchronizing signalsshown by waveform 24 simultaneously terminate a previously generatedramp signal and initiate a new ramp signal.

The magnetic pattern stored in track 16a generates the waveform 26 ofFIG. la for the purpose of generating unblanking signals represented bywaveform 27.

The operation of the system of FIG. 1 is as follows:

The signals of tracks l6a-I6c are picked up by readout heads ll92l,respectively, and applied to their associated circuits. The signalspicked up by readout head 21 are applied to amplification andramp-generating circuit 28 which is capable of amplifying the signalpicked up by head 21 and generating a sawtooth waveform such as 23,shown in FIG. lla, for application to the vertical deflection plate pair13.

The signals picked up by readout head 20 are applied to a similar typeamplifier and ramp generator circuit 29 for amplification and generationof ramp signals to be applied to the horizontal deflection plate pair12. These signals are satisfactory for deflecting the electron beam (notshown) to sweep the face Ila of the cathode-ray tube. The electron beamis modulated (in some cases by variation in the degree of beam intensityand in other cases by either being completely ON or OFF) by means of thesignals picked up by head 19 which are applied to amplification andcontrol circuit 30. In the application where it is desired to simply cutoff the electron beam or allow the electron beam to strike the face ofthe cathode-ray tube at a constant beam strength, the circuit 30, uponthe application of pulse 26', shown by waveform 26, is caused to unblankthe electron beam. The application of the next pulse 26" shown bywaveform 26 and applied to circuit 30 terminates the unblanking of theelectron beam. The control signals are applied to a suitable controlgrid schematically shown by numeral 15 in FIG. 1. The arrangement shownin FIG. 1 may be employed for cathode-ray tube display systems for thedisplay of numerals, characters and other symbols as is set forth indetail in copending application Ser. No. 718,553, filed Apr. 3i, I968.One of the major purposes of the character display system described inthis application is to generate a display which provides good contrastto assure ease of readability, to be highly reliable and to be quiteinexpensive relative to conventional techniques. The highly simplifiedmemory-storage system shown in FIG. 1 may be of the type described indetail in copending application Ser. No. 731,421 filed May 23, 1968. Inthe memory drum described in copending application Ser. No. 731,421 thehead assembly is provided with a minimum of three readout heads toenable readout of the synchronizing signals for deflection of theelectron beam and for the unblanking synchronizing signals for thepurpose of generating the unblanking signals which modulate theintensity of the electron beam. One of the significant advantages of thepresent invention is to provide a system having the capability ofperforming all of the functions performed by the system of FIG. 1 whileat the same time eliminating the need for one of the three storagelocations in the memory and thereby further eliminating the need for oneof the readout heads.

FIG. 2 shows one preferred embodiment 35 for simplifying the storage andcontrol circuitry, while FIG. 2a shows a plurality of waveforms usefulin describing the operation of the arrangement in FIG. 2. The preferredembodiment 35 of FIG. 2 is comprised of a rotating memory drum 16 havinga track which is substantially identical to the storage location 16a ofFIG. I which produces signals in head 19 for the ultimate generation ofunblanking signals applied to the control grid of the cathode-ray tubeby means of circuit 39. The magnetic pattern is arranged in such a wayas to generate pulses of the type shown by waveform 26 in FIG. Ia andpreviously described. As an alternative arrangement, it should be notedthat the magnetic pattern may be replaced by a contrasting pattern oflight and dark areas (i.e. areas having contrasting reflectingcapabilities) for pick up by a light-sensitive device.

The second track 16b provided on the surface of rotating memory drum 16is provided with a magnetic pattern capable of generating signals inreadout head 20 of the type shown by waveform 31 of FIG. 2a. Thestarting" pulses 32 of waveform 31 can clearly be seen to be of greateramplitude than the remaining pulses in the waveform 31. The waveforms 23and 25 are substantially identical to waveforms signal and 25 of FIG. laand represent the ramp signals generated for operating the Y" and "X"deflection plates of the cathode-ray tube in the same manner as waspreviously described. It can be seen that all pulses (i.e. pulses 32 aswell as pulses 33) are capable of terminating a previously initiatedramp signal simultaneous and initiating a new ramp signal as shown bywaveform 25. However, the signals 33 are only capable of triggering theX deflection ramp signals, as will become obvious from a considerationof the embodiment of FIG. 2.

FIG. 2 is further comprised of a pair of threshold amplifiers 36 and 37which are set at different threshold levels for the purpose ofgenerating signals at their outputs when the threshold levels at whichthey are set are achieved by pulses applied at their input terminals.Threshold amplifier circuit 36 is set to detect the presence of signalsof greater amplitude than threshold amplifier circuit 37. The output ofreadout head assembly 20 is simultaneously applied to the inputs ofcircuits 36 and 37 whose outputs, in turn, are coupled to the Y" rampgenerator and X ramp generator circuits 28 and 29, respectively. Theoutputs of these circuits are directly applied to the deflection platesof a CRT in the same manner as is shown in FIG. I.

The threshold levels of circuits 36 and 37 are represented by thephantom lines 36a and 370 shown in conjunction with waveform 31 of FIG.2a. Although the signals 33 of waveform 31 are simultaneously impressedupon the inputs of circuits 36 and 37, these signals surpass thethreshold level set in circuit 37 but fail to reach the threshold levelof circuit 36. This means that only threshold amplifier circuit 37 willapply a pulse to X" ramp generator 29 while circuit 36 will develop nooutput. Each time a pulse is applied to X" ramp generator 29 apreviously generated ramp signal will be terminated and a new rampsignal will be initiated, as shown by waveform 25 Each time a signal 32is simultaneously applied to circuits 36 and 37, the signal will surpassthe threshold level set by both of the circuits causing both circuits tosimultaneously develop a pulse at its output to trigger the terminationof a ramp signal and the initiation of a new ramp signal by both the Y"ramp generator 28 and the X ramp generator 29, respectively.

It can thus be seen that the arrangement of FIG. 2 is capable ofgenerating the necessary control signals for both deflecting andmodulating the intensity of the electron beam while eliminating the needfor one storage location of the memory and likewise eliminating the needfor a readout head assembly which would otherwise be provided for thatstorage location. The location of each of the pulses 32 is dependentonly upon the number of lines which the electron beam is to scan. Forexample, if a complete scan is to consist of 20 horizontal lines, thenevery 20th pulse of waveform 31 should be a pulse of the type shown bythe numerals 32. Obviously, the pulses of the type shown by the numerals32 may be spaced closer together or further apart, depending only uponthe number of lines which the electron beam is to scan.

FIG. 3 shows still another preferred embodiment which may be employedfor the purpose of generating "X and Y deflection signals.

The embodiment 40 of FIG. 3 is comprised of a rotating memory 16substantially similar to that shown in FIGS. 1 and 2 which is driven bymotor means 17 through shaft I8. The track 16a contains a magneticpattern (or a contrasting light and dark pattern) representativeof theunblanking signals which are to be generated and which signals are ofthe type shown by waveform 26 of FIG. la. Track 16b contains magneticpatterns substantially identical to the track 16b of FIG. 1 and iscapable of generating signals of the type shown by waveform 24 of FIG.la. These signals are simultaneously ap plied to the input of a counter41 and to the input of a rampgenerating circuit 29 for producing rampsignals applied to the X deflection plates. The signals of the typeshown by waveform 24 ofFIG. 1a cause counter 41 comprised of fiveinterconnected bistable stages, to develop a cumulative count. In theexample given in FIG. 3 wherein the counter is comprised of five stages,the counter would be capable of accumulating a total count of 32, atwhich time it would automatically reset. A decoding circuit 42 iscoupled to selected output terminals of each of the stages of counter 41for the purpose of generating an output signal after a predetermined.count has, been accumulated within the counter. This output pulse isapplied to the ramp generator circuit 28 which, in turn, generates aramp signal having the waveform 23 shown in FIG. la for the purpose ofdriving the Y" deflection plates in the same manner as was previouslydescribed.

In the case where it is desired to cause the electron beam to scan 20horizontal lines on the face of the cathode-ray tube, the decodingcircuit 42 is arranged in such a manner as to generate an output pulseapplied to circuit 28 each time a total of 20 pulses of the type shownby waveform 24 of FIG. 1a.;is applied to the input terminal 41a ofcounter 41. One decoding circuit capable of performing this functionisshown in FIG. 3 and is comprised of three inverter circuits 43a-43crespectively coupled to the first, second and fourth stages of counter41. The outputs of these inverters are directly coupled to selectedinputs of a five-input AND gate 44. The output terminals of theremaining stages, i.e. the third and fifth stages of counter 41, aredirectly coupled to the remaining input terminals of AND gate 44. Assoon as a count of 20 has been accumulated in counter 41, the stageswill be in the binary stages, as shown in FIG. 3, namely lOlOO, which inbinary form represents a count of 20. The third and fifth stages applybinary ONE levels to the associated inputs of AND gate 44. The binaryZERO states of the first, second and fourth stages are inverted tobinary ONE by the inverter circuits 43a-43c causing all input terminalsof AND gate 44 to be at binary ONE at a time when the counter stores abinary count representative of the application of 20 pulses of the typeshown by waveform 24 of FIG. 1a. The output of AND gate 44' issimultaneously applied to the input of ramp generator circuit 28 and tothe reset input terminal of each of the stages of counter 41 throughconductor 45 automatically resetting the. counter in readiness foraccumulating a new count of 20.

Since the rotating memory drum, upon being turned ON, may begin rotationat any one of the pulses in waveform 24 which is not in exact alignmentwith the starting point of the unblanking signals stored in tracks 16a,it becomes necessary to provide means in which the "Y" pulses generatedwill occur at the beginning of each trace of 20 horizontal lines on theface of the cathode-ray tube. This function is performed by providingAND gate 46 having a first input terminal coupled; to the output ofreadout head 20 and having a second input terminal coupled to the outputof readout head 19. The effectiveness of this circuit will be understoodfrom a consideration of FIG. 3a which shows the front face 11a of acathode-ray. tube 11. Although it is possible to cause an electron beamto scan the entire surface area of the cathode-ray-tube front face; 110,in most applications it is preferable to confine the electron beam totrace the face of the tube only in the substantially rectangular-shapedregion defined by the dotted line 47. Typical images which may be formedupon the face of the tube within the rectangular-shaped region 47 may bealphabetic or numeric characters or other symbols. FIG. 3a shows twopossible characters, namely the letter A and the letter B which may beformed within the region 47 From a consideration of either of these twocharacters or of any other symbol which may be written on the face ofthe cathode-ray tube, it is quite possible to prohibit any portion ofany letter or other symbol from.

being positioned in the upper left-hand corner 48 of therectangulardisplay area 47 without in any way hampering the effectiveness, clarityof readability of such a letter. For example, it can be clearly seenthat the characters A and B are easily readable and provide therequisite clarity while at the same time having no portion of either ofthese letters occupying a position which lies along the left-handvertical edge of the;

rectangular area 47. For this reason, none of the signals included inwaveform 26 will be coincident in time with any of.

the signals of waveform 24 or with any of the signals of waveform 22. Itis, therefore, possible to provide a single pulse 26 (see waveform 26 ofFIGS. la and 3) which occupies a lstarting position in track 16a andcorresponds with point 48'.

The starting" position can best be understood from copending applicationSer. No. 718,553 which describes a character display system. The trackwhich is the equivalent of track 160 of the present application containsa magnetic pattern representative of signals for controlling thegeneration of unblanking signals which, in the example set forth in theabovementioned copending application, contains a magnetic pattern forunblanking signals capable of generating l6 different characters orother symbols. The actual starting" point may be arbitrarily set at theinitiation of any character of the group of 16, which point must becoincident at least with the pulse employed to initiate any one of theramp signals shown by waveform 23 for application to the Y" deflectionplates. Each of the ramp signals, shown in waveform 23 can be seen topersist for a time duration which is equal to the time required to formone single trace across the face of the cathode-ray tube and whichthereby begins and is terminated simultaneously with the initiation andtermination, respectively, of the single trace (of a predeterminednumber of horizontal lines) upon the face of the cathode-ray tube. Sinceeach of the unblanking signals are initiated after the initiation of anyone of the ramp signals shown by waveform 25 and are terminated beforethe termination of any of the ramp signals shown by waveform 25, therewill be no coincidence between any of the signals shown by waveform 26and the signals shown by waveforms 22 or 24. However, by deliberatelyinserting a single signal 26' at the starting" point of track 160, thenthe signals 22 and 26 will occur in time synchronism. In the examplegiven in FIG. 3, none of the signals 22 occurs. However, these signalswould otherwise occur in synchronism with associated signals shown inwaveform 24 at the vertical dotted lines t,, t and t of FIG. 1a. Thesignals 26' and 24 (see FIG. la) which now occur in time synchronism,are picked up by readout heads 19 and 20 and applied to associatedinputs of AND gate 46. Once during each revolution of rotating memory16, the signals 26' and 24' will occur in time synchronism causing gate46 to develop an output which is impressed by conductor 45 upon all ofthe reset input terminals of each stage of counter 41. Diode 49 iscoupled between the output of AND gate 46 and circuit 28 to prevent anyapplication of this signal to circuit 28. Thus, each stage of counter 41will be reset to binary ZERO, thereby automatically initiating a newcount in the counter and exactly synchronizing the counter with theoccurrence of the unblanking signals and synchronizing signals picked upby readout heads 19 and 20, respectively. Although it is possible, uponinitial energization of the system of FIG. 3, to generate an incorrectcount in counter 41, this incorrect count will be automaticallycorrected after a maximum time period equal to one complete revolutionof the rotating memory 16 to place the entire system in synchronism.Since the rotating memory in one preferred embodiment rotates at a rateof 1,800 rpm, one revolution of the rotating memory will occursubstantially within 33.3 msec. Thus, by delaying operation of thesystem for this extremely brief interval of time, which is sufficient toreset counter 41 into the desired synchronous operation, the system willoperate thereafter without fault. Although the gate 46 will operate toreset counter 41 for each completed revolution of the rotating memory16, this operation will be quite satisfactory since the counter shouldbe resetting at this mo ment in any case. Thus, the resetting gate mayfurther be said to operate to continuously maintain the synchronousrelationship once per revolution of the rotating memory.

After the accumulation of 20 pulses of the type shown in waveform 24, apulse is applied to circuit 28 for initiation of a new ramp signal forapplication to the Y" deflection plates. The pulses shown by waveform 24are also free to operate circuit 29 to generate the requisite Xdeflection pulses. It can therefore be seen that the apparatus of FIG. 3provides another alternative arrangement for suitable generation of Xand Y" deflection signals and unblanking signals while eliminating theneed for one track and one readout head normally associated therewith asis the case with conventional devices.

FIG. 4a shows still another alternative embodiment 50 which may beemployed to generate the requisite signals mentioned hereinabove whileeliminating the need for one track of the memory device and for furthereliminating the need for the readout head normally associated therewith.The waveforms of FIG. 4d are useful in explaining the operation of thecircuit 50 of FIG. 4a.

Referring initially to FIG. 4d, waveforms 23 and 25, which aresubstantially identical to those shown in FIG. 1a, represent therequisite ramp signals for application to the Y" and X" deflectionplates of the cathode-ray tube as shown in FIG. 1, for example. Waveform51, however, which is substantially similar to waveform 24 of FIG. 1a,differs from waveform 24 in the following manner:

Considering FIG. 1a, it can be seen that each pulse of waveform 24 actsto initiate a new ramp signal as indicated by waveform 25. However, inthe waveform 51 of FIG. 4d, two closely spaced pulses 51a and 51b areprovided at each time interval represented by the lines 52 which arefurther timecoincident with the initiation of each Y ramp signal. Thesignals of waveform 51 may be provided in the form of a magnetic patternin track 16b of the rotating memory for pick up by its associatedreadout head 20 to generate the signal shown by waveform 51. As anobvious alternative, the magnetic drum approach may be replaced by acoded pattern of alternating light and dark surface areas, which areasare sensed by a suitable light-sensitive means which picks up lightreflecting from the surface of the rotating memory as is well-known insuch codes or discs. The double" pulses 51a and 51b may be representedin such a photoelectric-type code disc by providing a light area havingdouble the width of any of the light areas representing the remainingpulses of waveform 51 thereby causing the photoelectric cell or anyother light-sensitive means to generate a pulse of twice the length ortime duration of a pulse representative of any of the remaining signalsas shown by waveform 51.

The circuitry 50 of FIG. 4a is provided with an input terminal 53coupled to the output of readout head 20 (or alternatively coupled tothe output of a light-sensitive device). The pulses represented bywaveform 51 are then applied to the base electrode of a transistor Q1which is coupled in such a manner with transistor 02 as to providecurrent amplification of the signals applied to the base electrode oftransistor Q1. The current-amplified pulses appear at the collectorelectrode terminal 54! of transistor 02 and are applied to the baseelectrode of transistor Q3 which operates to produce voltageamplification of the signals applied thereto. These amplified signalsappear at the collector output terminal 55 of transistor 03 and areinverted in the manner shown by wavefonn 56 in addition to beingamplified. The amplified inverted signals are, in turn, coupled to thebase electrode of transistor Q4 through capacitor C5 and diode D1. DiodeD blocks positive pulses from being applied to the base of Q TransistorQ4 operates to invert and amplify the first half of signal 56 so that itassumes a wave shape 56. This signal appears at the collector terminal57 of transistor Q4 and is coupled through resistor R16 to the X outputterminal 58 which is connected to the ramp-generating circuit for the X"deflection plates of the cathode-ray tube.

The signal 56' is further coupled to the base electrode of transistor Q5through resistor R14 and diodes D2 and D3. The common terminal 59between diodes D2 and D3 is coupled to ground bus 66 through theparallel connected circuit elements comprising capacitor C6 and resistorR15. Diode D2 is connected in such a manner that only the positivehalf-cycle signals 56' appear at terminal 59. These signals areintegrated by capacitor C6. The emitter electrode of transistor Q5 isconnected to a common terminal 61 between resistors R18 and R19 whoseopposite terminals are connected between the positive DC bus 62 andground bus 60. Thus, emitter terminal 61 is permanently biased at apredetermined positive level at a value sufficient to render transistorQ5 initially conducting. The current flowing in the branch circuitextending from positive DC bus 62, resistor R18, transistor 05 andresistors R20 and R21 to ground bus 60 thereby develops a voltage acrossresistor R21 of a magnitude and polarity to also render transistor 06initially conductive.

Each single pulse 56 applied to diode D2 and integrated by capacitor C6is passed by diode D3 to the base electrode of transistor 05. Thepositive voltage stored across capacitor C6, while sufficient to causeconduction of diode D3, is of insufficient value to render transistor Q5nonconductive, it being less than the bias voltage applied to theemitter electrode of transistor Q5. The conduction of diode D3 enablesthe capacitor C6 to be discharged through resistor R17 to ground bus 60,in addition to the discharge path through resistor R15 to ground. Thevalues of components R15, C6 and R17 are selected to cause discharge ofcapacitor C6 before receipt of the next pulse of the type 56 applied toterminal 59. This operation is repeated each time a single pulse of thetype 56' is applied to the input terminal 53.

The double pulses 51a and 51b, however, which occur at each timeinterval designated by the vertical dotted lines 52 shown in FIG. 4d aregenerated within a very brief time interval which is significantlyshorter than the time interval between the remaining pulses 51c ofwaveform 51. This enables capacitor C6 to charge sufficiently to developa voltage which is greater than the magnitude of the voltage developedacross capacitor C6 in the presence of a single pulse. This voltage ispassed through diode D3 to the base electrode of transistor 05 and dueto the significantly increased positive amplitude developed acrosscapacitor C transistor is driven into cutoff. The base electrode of O isconnected to the collector electrode of transistor 0 causing the voltagelevel developed across R to render transistor 0 nonconductive. Aresulting positive going output signal is thus produced at the collectorelectrode terminal 63 which is passed to the Y output terminal 64through resistor R23.

Recapitulating the operation described hereinabove, each X" pulse whichis of the type shown by the pulses in waveform 24 of FIG. la, issuitably amplified and appears at output terminal 58 for triggering theoperation of an X ramp generator, one preferred embodiment of which willbe more fully described hereinbelow. These amplified signals are furtherimpressed upon an integrating circuit and a discriminator capable ofdetecting the presence of a double pulse" for generating a signal atterminal 64 to trigger a "Y" ramp generator. The discharge rate of theintegrating circuit is of sufficient magnitude to allow the charge fromany single pulse to be bled through resistor R17 (and R) before theapplication of the next single pulse to capacitor C6.

The additional circuitry of FIG. 4a may be utilized in character displaysystems of the type described in copending application Ser. No. 718,553,referred to hereinabove. In that application there is described acharacter display system in which the generation of each pulse causingthe triggering of a Y" ramp circuit also operates as a marker" whichindicates the beginning of each character or symbol stored in the 2"track of the drum. In the example given in the above-mentioned copendingapplication, l6 characters are stored in one track of memory while theY" triggering pulses are located in another track in memory in apredetermined physical relationship to the Z" track such that eachsynchronizing pulse in the Y track locates one of the I6 characters. Thecharacter display system of the above-mentioned copending applicationtakes advantage of this fact by applying the triggering pulses for the Yramp generator to a counter whose count at any given moment is comparedagainst a binary coded number provided in an input facility which, whencomparison exists between the binary number in the input facility andthe binary count developed in the counter, allows passage of theunblanking signals to a preselected cathode-ray tube in order to displaythe selected character which is identified by the binary number set intothe input facility.

Applying the above-mentioned arrangement to the present invention, thetrailing edge of the triggering pulses developed at the collectorelectrode 63 of transistor 06 are passed through conductor 65 and diodeD4 to the input terminal 66a of a counter 66 comprised of the fourbistable stages 67-70 which are interconnected in a conventional mannerto cause the counter 66 to accumulate a count therein, which count isincreased by one each time an output signal appears at the collectorelectrode terminal 63 of transistor 06.

Each of the stages 67-70 are coupled through resistors R28-R3l,respectively, to the base electrodes of transistors 09-012,respectively, which are connected in emitter follower fashion, eachhaving an emitter resistor R32-R35, respectively. The binary states ofeach of the stages 67-70 are thus available at the output terminals (is.the emitter electrode terminals) 71-74 of transistors 09-012,respectively. These output terminals may be coupled to logical circuitry(not shown) which is described in detail in the above-mentionedcopending application Ser. No. 718,553, which logical circuitry permitspassage of the unblanking signals to a selected cathode-ray tube whenexact comparison between the binary coded signals appearing at terminals71-74 and the binary input signals at the input facility (not shown)occurs.

During each revolution of the rotating memory 16, pulses appearing atterminal 63 are applied to input terminal66a of counter 66. In order toprovide for reliable reset of the counter 66, a reset circuit 75 isprovided. This circuit is comprised of transistor 07 whose baseelectrode is coupled through resistor R24 and terminal 78 to terminal108 of the Y ramp generator shown in FIG. 4c, which circuit will be morefully described. The emitter electrode of transistor 07 is coupled tothe ground bus 60, while the collector electrode of transistor O7 iscoupled through resistor R25 and terminal 79 to terminal 95 of the Z"amplifier and shaper circuit shown in FIG. 42, which circuit will bemore fully described. The collector electrode terminal 76 of transistor07 is coupled to the base electrode of transistor 08 whose emitterelectrode is coupled to ground bus 60 and whose collector electrode iscoupled through conductor 77 to each reset input terminal 67a- 70a ofeach of the stages 67-70, respectively, of counter-66.

The Y ramp generator of FIG. 40 and the "Z amplifier and shaper circuitof FIG. 4e operate in a manner to be more fully described so as to applypositive signals relative to ground to the terminals 78 and 79,respectively. These positive signals are applied through resistors R24and R25 to the base and collector electrodes, respectively, oftransistor Q7 which has its collector electrode terminal 76 coupled tothe base electrode of transistor Q8. Transistor Q8 has its emitterelectrode coupled to the ground bus 60 and its collector electrodecoupled to +22 v. DC through resistor R27. In its quiescent state thecollector electrode terminal is at a positive level lying between groundand +22 v. DC due to the voltage divider arrangement of resistors R27and R26. The level is approximately +7 v. when transistor O8 isnonconductive. Counter 66 is designed so that each of its stages 67-70willbe reset to binary ZERO state when a negative-going pulse is appliedto each of their reset input terminals 6712-7011. In normal or quiescentstate the level at terminals 79 and 78 are such that transistor 67conducts causing the collector terminal 76 to be at ground potential.This potential maintains transistor 08 nonconductive establishing avoltage of approximately 7 v. at its collector electrode terminal 80.

The incoming (inverted) "Y pulse and the Z" in pulse are negative andpositive, respectively, and occur in time synchronism only once duringeach revolution of the drum. At this time, the negative pulse applied tothe base electrode of transistor Q7 turns OFF transistor O7 in spite ofthe positive voltage applied to terminal 79. This causes terminal 76(when transistor 07 is nonconductive) to go positive and thereby turn ONtransistor Q8. This causes its collector electrode terminal 80 to gofrom approximately +7 V. to approximately ground potential, therebyestablishing a negative-going voltage in conductor 77 which is appliedto each of the reset input terminals 67a- 70a of counter stages 67-70,respectively, to reset all stages to binary ZERO. Thus, the counter willbe reset to count the number ofY pulses occurring per revolution of thedrum and be reset automatically at an arbitrary starting point.

FIG. 42 shows a Z" amplifier and shaper circuit 90 which amplifies andshapes the pulses generated in the readout head associated with thetrack 16a of the rotating memory (see FIG. 1, for example). The readouthead 19 has its output coupled to the input terminal 91 of circuit 90.This signal is applied through capacitor C7 to the base electrode oftransistor Q17. Transistor Q17, together with transistors Q18 and Q19form a three-stage amplifier circuit provided with feedback paths forstabilization thereof. The amplified output signal appears at thecollector terminal 92 of transistor Q19 and is applied through capacitorC11 and the parallel connected circuit elements R49 and C12 to the baseelectrode of transistor Q20. Transistors Q20 and Q21 are connected toform a Schmitt trigger circuit. The output of the Schmitt triggercircuit is taken from the common terminal 93 between resistors R52 andR53 which are series-connected between the +22 v. DC bus 94 and thecollector electrode of transistor Q2 l. Terminal 93 is coupled to thebase electrode of transistor Q22 which Is coupled to operate as a pulseamplifier. The output of the circuit appears at terminal 95. The levelof the output voltage at terminal 95 is normally at ground. potentialexcept In the presence of a Z (i.e. an unblanltirig pulse). In orderthat terminal 95 be at ground potential, transistor 022 is maintainednonconductive by the Schmitt trigger circuit. In the presence of apulse, the Schmitt trigger circuit comprised of transistors Q20 and Q21,turns ON transistor Q22 driving the output terminal 95 to nearly +22 v.DC. Reset of the Schmitt trigger circuit is determined by the commonemitter resistor R51 which controls the circuit hysteresis for causingreset of the circuit at a voltage level substantially lower than thesetting of the circuit. Diode D7 is provided to cause more rapidtriggering operation of the Schmitt circuit. Thus, each positive-goingunblanking pulse such as the pulse 26' shown in waveform 26 of FIG. 1a,causes the generation of a pulse at output terminal 95, while itsassociated negative-going pulse 26" terminates the square pulse such as,for example, square pulse 27' produced at output terminal 95. The pulseduration of the pulses of waveform 27 is dependent upon the timeinterval between the positive and negative pulses of waveform 26. FIG.4b shows a ramp-generating circuit which may be employed for the purposeof generating a ramp applied to the X" deflection plates of acathode-ray tube. The circuit 100 of FIG. 4b is comprised of transistor013 which is connected to operate as a constant current generator forcharging capacitor C13 which has one of its terminals coupled to +22 v.DC through conductor 101 while its remaining terminal is coupled incommon to the collector electrode of transistor Q and to output terminal102. Transistor 014 is also connected between conductor 101 and terminal102 in parallel with capacitor C13. The output terminal 58 is coupled tothe input terminal 103 of circuit 100 for driving transistor Q13.Transistor 013 is normally maintained nonconductive in the absence of anoutput pulse from terminal 58 maintaining terminal 104 in its collectorcircuit near +22 v. DC, which level is applied to the base electrode oftransistor Q14 to maintain this transistor nonconductive. As soon as atrigger pulse is removed from input 103 capacitor C13 begins to charge,developing a voltage across its electrodes with the charging ratecontrolled by constant current generator transistor 015. The currentsupplied by transistor Q15 is controlled by transistor Q16 which isnormally maintained in the conductive state. The voltage drop developedacross resistor R35 by transistor O16 establishes the bias level at thebase electrode of transistor Q15 which is connected to resistor R35 atter minal 105.

The primary function performed by the ramp generator circuit in FIG. 4bis to cause the ramp signal to experience a voltage swing bctween itsstart and end points at fixed upper and lower voltage levels regardlessof the deviation in pulse rate 01 the synchronizing pulses applied tothe circuit input terminal 103. Such changes in the pulse rate may, forexample, be due to changes in the rotating speed of the rotatablememory. In conventional ramp generators, changes in the pulse rate willcause the ramp signal to swing between a greater or lesser voltagerange. The advantageous feature of the circuit of FIG. 4b is such as tocause the initial and final points of the ramp to be absolutely fixedbetween upper and lower voltage levels in spite of the fact that theremay be as much as a i20 percent deviation pulse rate and hence therotating speed of triggering pulses applied to terminal 103. This uniqueoperation is obtained through the use of capacitor C14 whose terminalsare coupled between -22 v. DC bus 106 and terminal 107 which, in turn,is coupled to output terminal 102 and hence one terminal of capacitorC13 through diode D4.

The operation of the circuit of FIG. 4b is as follows:

Let it be assumed that the control circuitry is energized and asynchronizing pulse is applied to input terminal 103. This renderstransistor Q13 conductive which causes a voltage drop to be developedacross resistors R31 and R32. The voltage drop developed across resistorR32 places the base electrode of transistor 0141 at a voltagesubstantially less than +22 v. DC, causing conduction of transistor 014.This causes instantaneous discharge of capacitor C13, driving outputterminal 102 to +22 v, DC. At 1,, (see FIG. 45]) the synchronizing pulseof waveform is removed from input terminal 103 and the constant currentgenerator comprised of transistor Q15 begins charging capacitor C13 sothat its output terminal 102 is driven negative at a constant andsubstantially linear rate. The charging rate is extremely fast due tothe high positive voltage at terminal 107 (relative to bus 106).Terminal 102 will therefore reach the negative voltage level at I, (seewaveform 111), well before the arrival of the next trigger pulseoccurring at 1 Terminal 102 thus (momentarily) goes more negative thanterminal 107 causing C14 to discharge somewhat through Q15 making thevoltage at 107 more negative reducing the current through Q16 and thevoltage drop across R35. This reduced voltage drop reduces the Q15current. At 1 the trigger pulse discharges C13 which charges at a ratenow determined by the present Q15 current. C14 charges less rapidlyreaching the negative level at t; just before the next trigger pulse attime I The ramp signal ultimately settles at a constant slope after justa few trigger pulses, and ramp generation continues at this rate, lockedbetween the fixed upper and lower voltage levels until another shift intrigger pulse repetition rate occurs. It has been found that the rampgenerator is capable of accommodating frequency shift of greater thani2.5 times a center frequency value which the circuit would normally bedesigned for and still accurately generate ramp signals which swingbetween the fixed upper and lower voltage levels.

Consider the case where the ramp generator has settled down to apredetermined repetition rate (determined by the rotational speed ofmemory 16) and swings between the fixed voltage levels. Let it beassumed that the memory-rotating speed decreases. The charging ratedetermined by the original memory-rotating speed causes C13 to reach thefixed level before the advent of the next trigger pulse. The voltage at102 goes more negative than the voltage at 107 causing C14 to discharge.The Q16 current is thereby reduced reducing the voltage drop across R35which causes the Q15 current to be reduced. In a few short cycles theramp signal settles in at the new repetition rate.

Consider the case where the memory-rotating speed increases. Theconstant current of Q15 is insufficient to cause C13 to fully chargecausing terminal 102 to reach a voltage level above the fixed lowerlevel. C14 thereby charges, slightly increasing the Q16 current,increasing the R35 voltage drop and increasing the Q15 current tothereby increase the charging rate ofCl3. The change occurs in a fewcycles and assures exact centering of the images to be displayed uponthe face of the CRT without the need for a highly accurate and expensiveconstant-speed drive means for the memory 16 (such as a synchronousmotor). Actually a simple AC or DC motor of only reasonably constantspeed need be employed.

This operation may be used to great advantage in character displaysystems of the type described in the above-mentioned copendingapplication Ser. No. 718,553 wherein the circuit 100 of FIG. 4b willguarantee absolute centering of the character displayed upon the face ofthe cathode-ray tube in spite of the fact that changes in the rotatingspeed of the drum may occur. The advantageous feature of the circuit 100is used to great advantage thereby greatly reducing the cost of thememory apparatus, since deviations in the rotating speed ofnonsynchronous motors will be more than compensated for by the operationof the ramp generator circuit 100.

FIG. 4c shows a ramp generator circuit substantially similar to FIG. 417for generating the ramp signals applied to the Y" or vertical deflectionplates of a cathode-ray tube. The circuit of FIG. 40 has been shownsubstantially in block diagram form since it is substantially identicalto that shown in FIG. 4b except that the values of capacitors C13 andC14 are modified to generate one ramp signal in the time that it takesto generate a plurality of ramp signals employed for driving the X" orhorizontal deflection plates of a cathode-ray tube. For example, seeFIG. 1 wherein a single ramp signal shown by waveform 23 is generatedfor a plurality of ramp signals shown by waveform 25. The circuitry 100of FIG. 40 is further provided with an output terminal 108 coupled tothe collector of transistor Q13 which output terminal 108 is coupled toterminal 78 of FIG. 4a.

The output terminal 95 of FIG. 4e is coupled to terminal 79 of FIG. 4a.As was previously described, output terminal 95 goes positive in thepresence of a Z" pulse applying positive voltage to terminal 79. Thepositive going voltage applied to terminal 79 occurs in coincidence witha negative-going pulse applied to terminal 78 only once per revolutionof the drum. The negative-going pulse or inverted Y" signal applied toterminal 78 is inverted by virtue of the operation of transistor 013 ofFIG. 4c which, when a pulse is applied to its input terminal 103 invertsthe pulse at its collector electrode to develop the inverted "Y signalat its output terminal 108. The simultaneous occurrence of an invertedY" pulse at terminal 78 and a positive pulse at terminal 79 causesconduction of transistor 08 of FIG. 4a for the purpose of resetting allstages of counter 66 to the binary ZERO state once er revolution of thedrum 16.

FIG. shows a portion of yet another embodiment of the invention usefulin an arrangement similar to that described with respect to FIG. 4a. Forthe sake of simplicity, only that portion of the embodiment of FIG. 5which differs from that of FIG. 4a is illustrated. Thus, input terminal150 of FIG. 5 will be understood to be connected to the collectorelectrode of transistor 04 of that drawing, while output terminal 151will be understood to be connected to the base electrode of transistorQ6. The signal applied to input terminal 150 is generally of the typeshown in waveform 153 of FIG. 5a.

In FIG. 5, transistors Q23 and 024 form part of a gating or monostablemultivibrator circuit 152, which together with diodes D and D21,condition the output transistor Q25 to respond only to the presence ofthe Y" double pulse at terminal 150. In the discussion that follows, itwill be assumed that the transient condition of multivibrator 152 existsfor a period greater than the time between the leading edge of the firstof the double pulses and the trailing edge of the second of thosepulses. It will also be assumed that the transient period issignificantly less than the time between successive X" pulses and thattransistor Q24 of multivibrator 152 is initially in its steady state orconductive condition.

In operation, resistor R59 couples the positive portion of the firstsingle pulse 160, applied to input terminal 150, to the impedancepresented by conductive transistor Q24. At that time, however, thatsignal is bypassed through diode D20 directly to the ground bus 60(through Q24). Diode D22 then couples the negative portion of pulse 160to the base electrode of transistor Q24, switching that transistor fromits conductive to its nonconductive condition. However, before anysecond single pulse 161 is applied to input terminal 150, multivibrator152 reverts to its normal steady-state condition, rendering transistorQ24 conductive once again to thereby reestablish the short circuit orshunt path from the common terminal between D20 and D21 to groundpotential.

The illustrated circuit responds to the pulse 161 in the same way aswith pulse 160. Since the sequence is repetitive, no signal will becoupled through diode D2] to output transistor Q25 in response to thesesingle pulse X" signals.

In response to the first of the Y double pulse signals 170' applied toterminal 150, the operation is basically the same. Thus, the positiveportion is coupled by way of resistor R59, diode D20 and transistor 024to the ground bus 60, while the negative portion is coupled via diodeD22 to transistor 024 to render transistor Q24 nonconductive.

However, by virtue of the relative time periods previously assumed, thesecond of the Y double pulses 171 is coupled to input terminal whiletransistor 024 is still in its nonconductive condition. Because of therelatively high impedance presented by transistor 024 at that time, .thepositive portion of the signal 171 coupled by resistor R59 to thejunction of diodes D20 and D21 is gated through diode D21 to the-baseelectrode of transistor 025, wherein it is effective to produce anegative-going pulse signal at output terminal 151 coupled to thecollector electrode of that transistor. Upon completion of its transientperiod, multivibrator 152 reverts to its steadystate condition, inreadiness for the next recurring X" single pulse.

It will be noted in these respects that the polarity of diode D22 issuch as to prevent the positive portion of pulse 171 from couplingthrough to the base electrode of transistor 024 to switch thattransistor from its then nonconductive state to its conductive state. Itwill also be noted that the negative portion of pulse 171, when coupledto the base electrode of transistor 024, is ineffective to turn off thatalready nonconducting transistor.

The resulting signal developed at output terminal 151 is then operatedupon by the remainder of the FIG. 4a circuit' in the manner thereindescribed. It will be apparent, therefore, that a Y" output pulse isdeveloped as in that circuit, only upon the occurrence of the Ydouble-pulse synchronizing signal.

It can be seen from the foregoing that the present invention providescircuitry capable of controlling the deflection and modulation ofelectron beams and cathode-ray tubes through: the use of a single memorymeans wherein the memory locations provided in memory may be reducedwhile at the same time all of the functions necessary for controllingmodulation and deflection of the electron beam are performed, resultingin a simplified control apparatus having fewer components. In additionthereto, novel ramp-generating circuits are provided to generate rampsignals having their upper and lower limits absolutely fixed between twovoltage values regardless of rather substantial changes in the operatingspeed of the memory to assure accurate and reliable centering of theimage displayed upon the face of the cathode-ray tube.

Although there has been described a preferred embodiment of this novelinvention, many variations'and modifications will now be apparent tothose skilled in the art. Therefore, this invention is to be limited,not by the specific disclosure herein, but only by the appending claims.

What I claim is:

1. Apparatus for controlling the deflection of a cathode-raytubeelectron beam and for controlling the modulation of the electron beamcomprising:

a cathode-ray tube having horizontal and vertical deflection means and acontrol electrode for modulating the intensity of the electron beam;

horizontal and vertical ramp-generating means for generating rampsignals each of a different constant slope, which ramp signals arerespectively applied to said horizontal and vertical deflection means;

a rotating memory having a first track;

first readout means associated with said first track for sensinginformation in said track;

the information in said first track comprising indicia which form apattern representing signals for triggering the operation of saidhorizontal and vertical ramp-generating means;

a first type of indicia being arranged at first equally spaced intervalsaround said first track;

a second type of indicia being arranged at second equally spacedintervals between adjacent indicia of said first type, the length ofeach of said second intervals being an integral multiple of said firstintervals;

said first readout means being adapted to generate signals of a firstand a second type as said first and second types of indicia respectivelypass said readout means;

said first type of signal being a single-pulse signal;

said second type of signal being a double-pulse signal, each pulse ofthe double-pulse signal being substantially identical to said first typeof signal;

said double-pulse signal occurring with substantially no time delayseparating its two pulse signals as compared with the time delay betweenadjacent single-pulse signals of the first signal type;

first circuit means for coupling the signals generated by said firstreadout means to said horizontal ramp-generating means for terminating apreviously generated ramp signal and initiating a new ramp signal;

second circuit means coupled to said first circuit means for applying atrigger signal to said vertical ramp-generating means for terminating apreviously generated ramp signal and initiating a new ramp signal when asecond type of signal generated by said first readout means is appliedto said first circuit means.

2. Control means for deflecting the electron beam of a cathode-ray tubein mutually perpendicular directions wherein the electron beam isdeflected a number of times in a first of said perpendicular directionsduring the time interval in which the electron beam is deflected once inthe remaining perpendicular direction, said means comprising:

first and second ramp-generating means for generating first and secondramp signals, each of a different constant slope, to deflect theelectron beam in said mutually perpendicular direction;

third means for applying first and second synchronizing signals to saidfirst and second ramp'generating means respectively, for controlling theduration of the ramp signals wherein one of said ramp-generating meansgenerates a number of consecutive ramp signals for each single rampsignal produced by the remaining rampgenerating means;

said third means further comprised of memory readout means;

rotating memory means comprising a rotating member having a single trackfor storing information representing both said first and said secondsynchronizing signals;

said track including predetermined indicia arranged at spaced intervalsabout said track;

said memory means including means for generating one of said firstsynchronizing signals each time one of said indicia moves past saidmemory readout means;

means for counting said first synchronizing signal;

means for generating one of said second synchronizing signals each timesaid counter accumulates a predetermined count,

3. Control means for deflecting the electron beam of a cathode-ray tubein mutually perpendicular directions wherein the electron beam isdeflected a number of times in a first of said perpendicular directionsduring the time interval in which the electron beam is deflected once inthe remaining perpendicular direction, said means comprising:

first and second ramp-generating means for generating first and secondramp signals each of a different constant slope to deflect the electronbeam in said mutually perpendicular directions;

third means for applying first and second synchronizing signals to saidfirst and second ramp-generating means respectively, for controlling theduration of the ramp signals wherein one of said ramp-generating meansgenerates a number of consecutive ramp signals for each single rampsignal produced by the remaining rampgenerating means;

said third means being further comprised of memory readout means;

rotating memory means comprising a rotating member having a single trackfor storing information representing both said first and said secondsynchronizing signals;

said track including predetermined indicia arranged at spaced intervalsabout said track;

every Nth indicia being ofa configuration different from all remainingindicia where N is an integer greater than I and is equal to the numberof deflections which the electron beam undergoes in one of said mutuallyperpendicular directions;

said readout means respectively generating a first type of signal whenone of said Nth indicia passes said readout means and generates a secondtype of signal when one of the remaining indicia passes said readoutmeans;

said first and second signal types differing in amplitude;

first threshold circuit means having a low threshold level sufi'lcientfor detecting the presence of both said first and second types ofsignals for producing said first synchronizing signals;

second threshold circuit means having a higher threshold levelinsufficient for detecting the presence of said first type of signal andsufficient for detecting the presence of said second type of signal forgenerating said second synchronizing signals.

4. Control means for deflecting the electron beam of a cathode-ray tubein mutually perpendicular directions wherein the electron beam isdeflected a number of times in a first of said perpendicular directionsduring the time interval in which the electron beam is deflected once inthe remaining perpendicular direction, said means comprising:

first and second ramp-generating means for generating first and secondramp signals each of a different constant slope to deflect the electronbeam in said mutually perpendicular directions;

third means for applying first and second synchronizing signals to saidfirst and second ramp-generating means respectively, for controlling theduration of the ramp signals wherein one of said ramp-generating meansgenerates a number of consecutive ramp signals for each single rampsignal produced by the remaining rampgenerating means;

said third means being further comprised of memory readout means;

rotating memory means comprising a rotating member having a single trackfor storing information representing both said first and secondsynchronizing signals;

said track including predetermined indicia arranged at spaced intervalsabout said track;

every Nth indicia being of a configuration different from all remainingindicia wherein N is an integer greater than 1 and is equal to thenumber of deflections which the electron beam undergoes in one of saidmutually perpendicular directions;

said readout means respectively generating a first type of signal whenone of said Nth indicia passes said readout means and generating asecond type of signal when one of the remaining indicia passes saidreadout means;

said first and second signal types differing in pulse duration;

amplifier means coupled to said readout means for amplifying the firstand second types of signals;

one of said ramp-generating means being coupled to said amplifying meansfor successively generating ramp signals upon receipt of each signalfrom said amplifying means;

llulunr integrating means coupled to said amplifying means forintegrating each signal applied thereto; said integrating meansincluding means for discharging each integrated signal prior to receiptof the next signal from said amplifying means;

threshold circuit means coupled to said integrating means having athreshold level insufficient for detecting the presence of an integratedsignal representing the shorter duration signals and sufficient fordetecting the presence of an integrated signal of the longer duration togenerate a triggering pulse for operating the remaining one of saidramp-generating means to initiate a ramp signal each time the thresholdcircuit detects an integrated signal which represents a signal of longertime duration 5. Apparatus for controlling the deflection of acathode-ray tube electron beam and for controlling the modulation of theelectron beam comprising:

a cathode-ray tube having horizontal and vertical deflection means and acontrol electrode for modulating the intensity of the electron beam;

horizontal and vertical ramp-generating means for generating rampsignals each being of a different constant slope which are respectivelyapplied to said horizontal and vertical deflection means;

rotating memory means having a single output for generating a continuoustrain of pulses spaced at substantially equal intervals, every Nth pulsein said pulse train being of a greater duration than the remainingpulses in said pulse train;

first circuit means for coupling the signals appearing at said singleoutput to said horizontal ramp-generating means for triggering thetermination of a previously generated horizontal ramp signal andinitiating a new horizontal ramp signal;

second circuit means coupled to said first circuit means for applying atrigger signal to said vertical ramp-generating means for triggering thetermination of a previously generated vertical ramp signal andinitiating a new vertical ramp signal only when a pulse of a greaterduration is detected;

means for counting the number of Nth pulses of said greater durationoccurring per revolution of the rotating memory;

said memory having a second output for generating unblanking signals forcontrolling the modulation of electron beam intensity;

only one of said unblanking signals being arranged to occur in timesynchronism with only one of said pulses of greater duration;

means responsive to the simultaneous occurrence of said one of saidpulses of greater duration and said one of said unblanking signals forresetting said counting means.

6. Control means for deflecting the electron beam of a cathode-ray tubein mutually perpendicular directions wherein the electron beam isdeflected a number of times in a first of said perpendicular directionsduring the time interval in which the electron beam is deflected once inthe remaining perpendicular direction, said means comprising:

first and second rampgenerating means for generating first and secondramp signals each of a different constant slope to deflect the electronbeam in said mutually perpendicular directions;

third means for applying first and second synchronizing signals to saidfirst and second ramp-generating means respectively, for controlling theduration of the ramp signals wherein one of said ramp-generating meansgenerates a number of consecutive ramp signals for each single rampsignal produced by the remaining rampgenerating means;

said third means being further comprised of memory readout means;

rotating memory means comprising a rotating member having a single trackfor storing information representing both said first and secondsynchronizing signals;

said track including predetermined indicia arranged at spaced intervalsabout said track;

every Nth indicia being of a configuration different from all remainingindicia where N is an integer greater than 1 and is equal to the numberof deflections which the electron beam undergoes in one of said mutuallyperpendicular directions;

said readout means respectively generating a first type of pulse signalwhen one of said Nth indicia passes said readout means and a second typeof pulse signal when one of the remaining indicia passes said readoutmeans,

said first and second signal types differing in the number of individualpulses in each of said types, and further comprising:

threshold circuit means for detecting the presence of both said firstand second types of pulse signals for producing said first synchronizingsignals and applying these signals to said first ramp-generating means;and

gating circuit means coupled to said threshold circuit means and adaptedto receive both said first and second types of pulse signals butresponsive only to said first type for producing said secondsynchronizing signals and applying these signals to said secondrampgenerating means.

7. Control means for deflecting the electron beam of a cathode-ray tubein mutually perpendicular directions wherein the electron beam isdeflected a number of times in a first of said perpendicular directionsduring the time interval in which the electron beam is deflected once inthe remaining perpendicular direction, said means comprising:

first and second ramp-generating means for generating first and secondramp signals each of a different constant slope to deflect the electronbeam in said mutually perpendicular directions;

third means for applying first and second synchronizing signals to saidfirst and second ramp-generating means respectively, for controlling theduration of the ramp signals wherein one of said ramp-generating meansgenerates a number of consecutive ramp signals for each single rampsignal produced by the remaining rampgenerating means;

said third means being further comprised of memory readout means;

rotating memory means comprising a'rotating member having a single trackfor storing information representing both said first and secondsynchronizing signals;

said track including predetermined indicia arranged. at

spaced intervals about said track;

every Nth indicia being of a configuration different from all remainingindicia where N is an integer greater than 1 and is equal to the numberof deflections which the electron beam undergoes in one of said mutuallyperpendicular directions;

said readout means respectively generating a first type of pulse signalwhen one of said Nth indicia passes said readout means and a second typeof pulse signal when one of the remaining indicia passes said readoutmeans,

said first and second types differing in the number of individual pulsesin each of said types, and further comprisamplifier means coupled tosaid readout means for amplifying the first and second types of signals;

one of said ramp-generating means being coupled to said amplifying meansfor successively generating ramp signals upon receipt of each signalfrom said amplifying means;

and gating circuit means coupled to said amplifying means forcontrolling the application of pulse signals, to the remaining one ofsaid ramp-generating means, said gating circuit means including amonostable mul tivibrator having a transient duration greater than thetime between the first leading edge and last trailing edge of the numberof individual pulses of said first signal type but of a transientduration less than the time between leading edges of successive pulsesof said signal type to thereafter couple a second pulse of said secondtype; first signal type to said remaining ramp-generator said monostablemultivibrator being in its steady-state means to terminate a previouslygenerated ramp signal condition upon application of successive pulses ofsaid and initiate a new p Signal each time Said second signal type tobypass said remaining ramptivibrator couples a pulse to said remainingrampgenerating means, and being triggered to its transient generatormeanscondition by a trailing edge of a first pulse of said first

1. Apparatus for controlling the deflection of a cathode-raytubeelectron beam and for controlling the modulation of the electron beamcomprising: a cathode-ray tube having horizontal and vertical deflectionmeans and a control electrode for modulating the intensity of theelectron beam; horizontal and vertical ramp-generating means forgenerating ramp signals each of a different constant slope, which rampsignals are respectively applied to said horizontal and verticaldeflection means; a rotating memory having a first track; first readoutmeans associated with said first track for sensing information in saidtrack; the information in said first track comprising indicia which forma pattern representing signals for triggering the operation of saidhorizontal and vertical ramp-generating means; a first type of indiciabeing arranged at first equally spaced intervals around said firsTtrack; a second type of indicia being arranged at second equally spacedintervals between adjacent indicia of said first type, the length ofeach of said second intervals being an integral multiple of said firstintervals; said first readout means being adapted to generate signals ofa first and a second type as said first and second types of indiciarespectively pass said readout means; said first type of signal being asingle-pulse signal; said second type of signal being a double-pulsesignal, each pulse of the double-pulse signal being substantiallyidentical to said first type of signal; said double-pulse signaloccurring with substantially no time delay separating its two pulsesignals as compared with the time delay between adjacent single-pulsesignals of the first signal type; first circuit means for coupling thesignals generated by said first readout means to said horizontalramp-generating means for terminating a previously generated ramp signaland initiating a new ramp signal; second circuit means coupled to saidfirst circuit means for applying a trigger signal to said verticalramp-generating means for terminating a previously generated ramp signaland initiating a new ramp signal when a second type of signal generatedby said first readout means is applied to said first circuit means. 2.Control means for deflecting the electron beam of a cathode-ray tube inmutually perpendicular directions wherein the electron beam is deflecteda number of times in a first of said perpendicular directions during thetime interval in which the electron beam is deflected once in theremaining perpendicular direction, said means comprising: first andsecond ramp-generating means for generating first and second rampsignals, each of a different constant slope, to deflect the electronbeam in said mutually perpendicular direction; third means for applyingfirst and second synchronizing signals to said first and secondramp-generating means respectively, for controlling the duration of theramp signals wherein one of said ramp-generating means generates anumber of consecutive ramp signals for each single ramp signal producedby the remaining ramp-generating means; said third means furthercomprised of memory readout means; rotating memory means comprising arotating member having a single track for storing informationrepresenting both said first and said second synchronizing signals; saidtrack including predetermined indicia arranged at spaced intervals aboutsaid track; said memory means including means for generating one of saidfirst synchronizing signals each time one of said indicia moves pastsaid memory readout means; means for counting said first synchronizingsignal; means for generating one of said second synchronizing signalseach time said counter accumulates a predetermined count.
 3. Controlmeans for deflecting the electron beam of a cathode-ray tube in mutuallyperpendicular directions wherein the electron beam is deflected a numberof times in a first of said perpendicular directions during the timeinterval in which the electron beam is deflected once in the remainingperpendicular direction, said means comprising: first and secondramp-generating means for generating first and second ramp signals eachof a different constant slope to deflect the electron beam in saidmutually perpendicular directions; third means for applying first andsecond synchronizing signals to said first and second ramp-generatingmeans respectively, for controlling the duration of the ramp signalswherein one of said ramp-generating means generates a number ofconsecutive ramp signals for each single ramp signal produced by theremaining ramp-generating means; said third means being furthercomprised of memory readout means; rotating memory means comprising arotating member having a single track for storing informationrepresenting both said first and said second synchronizing signAls; saidtrack including predetermined indicia arranged at spaced intervals aboutsaid track; every Nth indicia being of a configuration different fromall remaining indicia where N is an integer greater than 1 and is equalto the number of deflections which the electron beam undergoes in one ofsaid mutually perpendicular directions; said readout means respectivelygenerating a first type of signal when one of said Nth indicia passessaid readout means and generates a second type of signal when one of theremaining indicia passes said readout means; said first and secondsignal types differing in amplitude; first threshold circuit meanshaving a low threshold level sufficient for detecting the presence ofboth said first and second types of signals for producing said firstsynchronizing signals; second threshold circuit means having a higherthreshold level insufficient for detecting the presence of said firsttype of signal and sufficient for detecting the presence of said secondtype of signal for generating said second synchronizing signals. 4.Control means for deflecting the electron beam of a cathode-ray tube inmutually perpendicular directions wherein the electron beam is deflecteda number of times in a first of said perpendicular directions during thetime interval in which the electron beam is deflected once in theremaining perpendicular direction, said means comprising: first andsecond ramp-generating means for generating first and second rampsignals each of a different constant slope to deflect the electron beamin said mutually perpendicular directions; third means for applyingfirst and second synchronizing signals to said first and secondramp-generating means respectively, for controlling the duration of theramp signals wherein one of said ramp-generating means generates anumber of consecutive ramp signals for each single ramp signal producedby the remaining ramp-generating means; said third means being furthercomprised of memory readout means; rotating memory means comprising arotating member having a single track for storing informationrepresenting both said first and second synchronizing signals; saidtrack including predetermined indicia arranged at spaced intervals aboutsaid track; every Nth indicia being of a configuration different fromall remaining indicia wherein N is an integer greater than 1 and isequal to the number of deflections which the electron beam undergoes inone of said mutually perpendicular directions; said readout meansrespectively generating a first type of signal when one of said Nthindicia passes said readout means and generating a second type of signalwhen one of the remaining indicia passes said readout means; said firstand second signal types differing in pulse duration; amplifier meanscoupled to said readout means for amplifying the first and second typesof signals; one of said ramp-generating means being coupled to saidamplifying means for successively generating ramp signals upon receiptof each signal from said amplifying means; integrating means coupled tosaid amplifying means for integrating each signal applied thereto; saidintegrating means including means for discharging each integrated signalprior to receipt of the next signal from said amplifying means;threshold circuit means coupled to said integrating means having athreshold level insufficient for detecting the presence of an integratedsignal representing the shorter duration signals and sufficient fordetecting the presence of an integrated signal of the longer duration togenerate a triggering pulse for operating the remaining one of saidramp-generating means to initiate a ramp signal each time the thresholdcircuit detects an integrated signal which represents a signal of longertime duration.
 5. Apparatus for controlling the deflection of acathode-ray tube electron beam and for controlling the modulation of theelectRon beam comprising: a cathode-ray tube having horizontal andvertical deflection means and a control electrode for modulating theintensity of the electron beam; horizontal and vertical ramp-generatingmeans for generating ramp signals each being of a different constantslope which are respectively applied to said horizontal and verticaldeflection means; rotating memory means having a single output forgenerating a continuous train of pulses spaced at substantially equalintervals, every Nth pulse in said pulse train being of a greaterduration than the remaining pulses in said pulse train; first circuitmeans for coupling the signals appearing at said single output to saidhorizontal ramp-generating means for triggering the termination of apreviously generated horizontal ramp signal and initiating a newhorizontal ramp signal; second circuit means coupled to said firstcircuit means for applying a trigger signal to said verticalramp-generating means for triggering the termination of a previouslygenerated vertical ramp signal and initiating a new vertical ramp signalonly when a pulse of a greater duration is detected; means for countingthe number of Nth pulses of said greater duration occurring perrevolution of the rotating memory; said memory having a second outputfor generating unblanking signals for controlling the modulation ofelectron beam intensity; only one of said unblanking signals beingarranged to occur in time synchronism with only one of said pulses ofgreater duration; means responsive to the simultaneous occurrence ofsaid one of said pulses of greater duration and said one of saidunblanking signals for resetting said counting means.
 6. Control meansfor deflecting the electron beam of a cathode-ray tube in mutuallyperpendicular directions wherein the electron beam is deflected a numberof times in a first of said perpendicular directions during the timeinterval in which the electron beam is deflected once in the remainingperpendicular direction, said means comprising: first and secondramp-generating means for generating first and second ramp signals eachof a different constant slope to deflect the electron beam in saidmutually perpendicular directions; third means for applying first andsecond synchronizing signals to said first and second ramp-generatingmeans respectively, for controlling the duration of the ramp signalswherein one of said ramp-generating means generates a number ofconsecutive ramp signals for each single ramp signal produced by theremaining ramp-generating means; said third means being furthercomprised of memory readout means; rotating memory means comprising arotating member having a single track for storing informationrepresenting both said first and second synchronizing signals; saidtrack including predetermined indicia arranged at spaced intervals aboutsaid track; every Nth indicia being of a configuration different fromall remaining indicia where N is an integer greater than 1 and is equalto the number of deflections which the electron beam undergoes in one ofsaid mutually perpendicular directions; said readout means respectivelygenerating a first type of pulse signal when one of said Nth indiciapasses said readout means and a second type of pulse signal when one ofthe remaining indicia passes said readout means, said first and secondsignal types differing in the number of individual pulses in each ofsaid types, and further comprising: threshold circuit means fordetecting the presence of both said first and second types of pulsesignals for producing said first synchronizing signals and applyingthese signals to said first ramp-generating means; and gating circuitmeans coupled to said threshold circuit means and adapted to receiveboth said first and second types of pulse signals but responsive only tosaid first type for producing said second synchronizing signals andapplying these signals to said Second ramp-generating means.
 7. Controlmeans for deflecting the electron beam of a cathode-ray tube in mutuallyperpendicular directions wherein the electron beam is deflected a numberof times in a first of said perpendicular directions during the timeinterval in which the electron beam is deflected once in the remainingperpendicular direction, said means comprising: first and secondramp-generating means for generating first and second ramp signals eachof a different constant slope to deflect the electron beam in saidmutually perpendicular directions; third means for applying first andsecond synchronizing signals to said first and second ramp-generatingmeans respectively, for controlling the duration of the ramp signalswherein one of said ramp-generating means generates a number ofconsecutive ramp signals for each single ramp signal produced by theremaining ramp-generating means; said third means being furthercomprised of memory readout means; rotating memory means comprising arotating member having a single track for storing informationrepresenting both said first and second synchronizing signals; saidtrack including predetermined indicia arranged at spaced intervals aboutsaid track; every Nth indicia being of a configuration different fromall remaining indicia where N is an integer greater than 1 and is equalto the number of deflections which the electron beam undergoes in one ofsaid mutually perpendicular directions; said readout means respectivelygenerating a first type of pulse signal when one of said Nth indiciapasses said readout means and a second type of pulse signal when one ofthe remaining indicia passes said readout means, said first and secondtypes differing in the number of individual pulses in each of saidtypes, and further comprising: amplifier means coupled to said readoutmeans for amplifying the first and second types of signals; one of saidramp-generating means being coupled to said amplifying means forsuccessively generating ramp signals upon receipt of each signal fromsaid amplifying means; and gating circuit means coupled to saidamplifying means for controlling the application of pulse signals to theremaining one of said ramp-generating means, said gating circuit meansincluding a monostable multivibrator having a transient duration greaterthan the time between the first leading edge and last trailing edge ofthe number of individual pulses of said first signal type but of atransient duration less than the time between leading edges ofsuccessive pulses of said second type; said monostable multivibratorbeing in its steady-state condition upon application of successivepulses of said second signal type to bypass said remainingramp-generating means, and being triggered to its transient condition bya trailing edge of a first pulse of said first signal type to thereaftercouple a second pulse of said first signal type to said remainingramp-generator means to terminate a previously generated ramp signal andinitiate a new ramp signal each time said multivibrator couples a pulseto said remaining ramp-generator means.